1. Field of the Invention
The present invention relates to a semiconductor device, and more particular to a flip-chip package.
2. Description of the Related Art
FIG. 4 is a sectional view of a flip-chip type semiconductor device for describing a first related art. Referring to FIG. 4, the device has a top layer wiring 46 on a semiconductor substrate 48, a cover layer 44 having a through hole 45 for exposing the top layer wiring 46, and a copper pad 42 to electrically connect with the wiring 46 via the through hole 45. As an example of the first prior art, there may be mentioned a technology disclosed in Japanese Patent Application Laid Open Hei 9-270426.
FIG. 5 is a sectional view of a flip-chip type semiconductor device for describing a second related art. Referring to FIG. 5, the device has a top layer wiring 56 on a semiconductor substrate 58, a cover film 54 having a through hole 55 formed on the top layer wiring 56 and the semiconductor substrate 58, a copper pad 52 to electrically connect with the wiring 56 via the through hole 55, a second cover film 51 formed on the pad 52, and a second opening 53 formed in the portion of the second cover film 51 above the top layer wiring 52.
However, since the wirings 45, 55 of the device according to the first and second prior arts are formed on the films 44, 54, respectively, a large area for the wiring is needed on the cover film. Therefore, it becomes difficult to form wirings without connecting from each other when the device is made smaller. FIG. 4 also has a problem in that it necessitates the process of forming the through hole 45. Moreover, the films 44 (45) has the through hole 45 (55) by a carved wall to position a solder ball (not shown) on a center of the wiring 44. However, it is difficult to form such a carved wall. Additionally, since the wiring 45 is made with a thin thickness enough to keep the carve of the carved wall and is patterned as shown in FIGS. 4 and 5, it needs complex technique to keep such demands.
It is an object of the present invention to provide a semiconductor device with high reliability and high yield that avoids the misalignment between the pad and a solder ball and reduces the area for the pad.
A semiconductor device of the present invention includes a semiconductor substrate, a wiring formed on the semiconductor substrate, a cover film formed on the semiconductor substrate and the wiring, the cover film has a through hole to expose the wiring, and a pad formed in the through hole to electrically connect to the wiring without being formed on a top surface of the cover film.
A method of manufacturing a semiconductor of the present invention includes:
forming a first insulating film on a first wiring, the first insulating film having a through hole to expose the first wiring;
forming a conductive layer on the film; and
etching the conductive layer until a top surface of the film is exposed to form a pad in the through hole.
Preferably, the conductive layer is etched by a chemical mechanical polishing process.